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.venv
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badge-lugman-backups
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********************************************************************************
* Software License Agreement *
* *
* The software supplied herewith by Microchip Technology Incorporated (the *
* 'Company') is intended and supplied to you, the Company's customer, for use *
* solely and exclusively on Microchip products. *
* *
* The software is owned by the Company and/or its supplier, and is protected *
* under applicable copyright laws. All rights are reserved. Any use in *
* violation of the foregoing restrictions may subject the user to criminal *
* sanctions under applicable laws, as well as to civil liability for the *
* breach of the terms and conditions of this license. *
* *
* THIS SOFTWARE IS PROVIDED IN AN 'AS IS' CONDITION. NO WARRANTIES, WHETHER *
* EXPRESS, IMPLIED OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED *
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO *
* THIS SOFTWARE. THE COMPANY SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR *
* SPECIAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER. *
*************************************************************************
.SUBCKT MCP6006 1 2 3 4 5
* | | | | |
* | | | | Output
* | | | Negative Supply
* | | Positive Supply
* | Inverting Input
* Non-inverting Input
*
*
* The following op-amps are covered by this model:
* MCP6006/6R/6U/7/9
*
* Date of model creation: 10-16-2020_9:37:12_AM
* Level of Model Creator: MCP6006_1P00 / 10-14-20
*
* Revision History:
* REV A: 5-Oct-20, Initial Input
* REV B: 14-Oct-20, Corrected VCM+, CM/DM, Noise
* REV C: 15-Oct-20, Updated VCM-
* REV D: 16-Oct-20, Updated RINCM/ZIN
*
*
* Recommendations:
* Use PSPICE (or SPICE 2G6; other simulators may require translation)
* For a quick, effective design, use a combination of: data sheet
* specs, bench testing, and simulations with this macromodel
* For high impedance circuits, set GMIN=100F in the .OPTIONS statement
*
* Supported:
* Typical performance for temperature range (-40 to 125) degrees Celsius
* DC, AC, Transient, and Noise analyses.
* Most specs, including: offsets, DC PSRR, DC CMRR, input impedance,
* open loop gain, voltage ranges, supply current, ... , etc.
* Temperature effects for Ibias, Iquiescent, Iout short circuit
* current, Vsat on both rails, Slew Rate vs. Temp and P.S.
*
* Not Supported:
* Some Variation in specs vs. Power Supply Voltage
* Vos distribution, Ib distribution for Monte Carlo
* Distortion (detailed non-linear behavior)
* Some Temperature analysis
* Process variation
* Behavior outside normal operating region
*
* Known Discrepancies in Model vs. Datasheet:
*
*
*
* EMI Stage
*
RF1 1 1A 304
RF2 2 2A 304
RF3 1A 1B 304
RF4 2A 2B 304
CF1 1A 4 3E-12
CF2 4 2A 3E-12
CF3 1B 4 3E-12
CF4 4 2B 3E-12
*
* Input Stage
*
V10 3 10 -500M
R10 10 11 69.0K
R11 10 12 69.0K
G10 10 11 10 11 1.44M
G11 10 12 10 12 1.44M
C11 11 12 115E-15
C13 1B 2B 1.00P
E12 71 14 VALUE { (-200U) + V(20) * 3.83 + V(21) * 3.83 + V(22) * 3.83 + V(23) * 3.83 }
* Generate Input Bias 1 and 2 and Input Offset
EG12 VIBIAS 0 62 0 1
EG13 VIBIOS 0 63 0 1
* Calculate IB1 and IB2 based on IOS
EIB1 VIB1 0 VALUE { (V(VIBIAS)+V(VIBIOS)) /2 }
EIB2 VIB2 0 VALUE { (V(VIBIAS)-V(VIBIOS)) /2 }
* Convert Voltage to Current on Pins 1 and 2
GIB1 1B 0 VIB1 0 1u
GIB2 2B 0 VIB2 0 1u
M12 11 14 15 15 NMI
M14 12 2B 15 15 NMI
I15 15 4 500U
V16 16 4 -295M
GD16 16 1B TABLE { V(16,1B) } ((-100,-50.0E-15)(0,0)(1m,1u)(2m,1m))
V13 3 13 -300M
GD13 2B 13 TABLE { V(2B,13) } ((-100,-50.0E-15)(0,0)(1m,1u)(2m,1m))
R71 1B 0 20.0E12
R72 2B 0 20.0E12
R73 1B 2B 10.0E12
*
* Noise
*
I20 21 20 1.00
D20 20 0 DN1
D21 0 21 DN1
I22 22 23 1N
R22 22 0 1k
R23 0 23 1k
*
* Open Loop Gain, Slew Rate
*
G30 0 30 TABLE { V(12, 11) } ((-5.5,-11)(-0.1,-0.1)(0,0)(0.1,0.1)(5.5,11))
R30 30 0 1.00K
G31 0 31 3 4 65.6
I31 0 31 DC -88.0
R31 31 0 1
E_VDDMAX VDE 0 3 4 1
V_VDD1 31VDD1 0 1.8
V_VDD2 31VDD2 0 5.5
G_ABMII2 0 31B VALUE { V(31)*(LIMIT(((V(31VDD1)-V(VDE))/(V(31VDD1)-V(31VDD2))), 0, 1))}
R_R3 31A 0 1 TC=3.87M, 8.02U
G_ABMII1 0 31A VALUE { V(31)*(LIMIT(((V(VDE)-V(31VDD2))/(V(31VDD1)-V(31VDD2))), 0, 1))}
G_G6 30 31C TABLE { V(30, 31C) } ((-100,-1n)(0,0)(1m,0.1)(101m,190.1))
E_ABM1 31C 0 VALUE { (V(31A) + V(31B)) }
R_R8 31B 0 1 TC=188U, -6.06U
G32 32 0 3 4 57.9
I32 32 0 DC -31.4
R32 32 0 1
G_ABMII22 32B 0 VALUE { V(32)*(LIMIT(((V(31VDD1)-V(VDE))/(V(31VDD1)-V(31VDD2))), 0, 1))}
R_R23 32A 0 1 TC=2.74M, -5.17U
G_ABMII21 32A 0 VALUE { V(32)*(LIMIT(((V(VDE)-V(31VDD2))/(V(31VDD1)-V(31VDD2))), 0, 1))}
G_G26 32C 30 TABLE { V(30, 32C) } ((-101m,190.1)(-1m,0.1)(0,0)(100,-1n))
E_ABM21 0 32C VALUE { (V(32A) + V(32B)) }
R_R28 32B 0 1 TC=-1.70M, -2.85U
G6 0 33 30 0 1m
R6 33 0 1K
*
* 1st Order Pole
*
G34 0 34 33 0 2.37
R34 34 0 1K
C34 34 0 300U
*
* 2nd Order Pole
*
G37 0 37 34 0 1m
R37 37 0 1K
C37 37 0 10.6P
*
* 3rd Order Pole
*
G377A 0 377A 37 0 1m
R377A 377A 0 1K
C377A 377A 0 159E-15
*
* 1st Order Zero
*
G38 0 38 377A 0 1m
GR38 39 0 39 0 1m
RR38 39 0 100G
L38 38 39 159N
*
* 2nd Order Zero
*
G38A 0 38A 38 0 1m
GR38A 39A 0 39A 0 1m
RR38A 39A 0 100G
L38A 38A 39A 159N
E38 35 0 38A 0 1
*
* Output Stage
*
R80 50 0 100MEG
G50 0 50 57 96 2
R58 57 96 0.50
R57 57 0 1.5K
* PSRR / CMRR
G57 0 57 VALUE { V(35) * 666U + V(118) + V(127) + V(137) }
*
*
* PSRR Plus Gain and GBWP Pole Neutralization and Wave Shaping
*
* G30 THE DC GAIN FOR +PSRR
G110 0 110 3 0 28.1U
* ADD POLE TO NEUTRALIZE GBWP ZERO
R110 110 0 10T
GR110 110 0 110 0 1M
C110 110 0 300U
*
*
* PSRR Plus Pole
*
G111 0 111 110 0 1
L111 111 112 3.53M
R112 112 0 10T
GR112 112 0 112 0 1
*
* PSRR Plus Zero
*
G114 0 114 111 0 1
R114 114 0 10T
C114 114 0 244N
GR114 114 0 114 0 1
*
* PSRR Plus 2nd Pole
*
G115 0 115 114 0 1
L115 115 116 79.6N
R116 116 0 1G
GR116 116 0 116 0 1
*
* PSRR Plus 2nd Zero
*
G117 0 117 115 0 1
R117 117 0 1G
C117 117 0 15.9P
GR117 117 0 117 0 1
*
* PSRR Plus 3rd Pole
*
G118 0 118 117 0 1
L118 118 119 79.6N
R119 119 0 1G
GR119 119 0 119 0 1
*
* PSRR Minus Gain and GBWP Pole Neutralization and Wave Shaping
*
* G40 THE DC GAIN FOR -PSRR
G120 0 120 4 0 28.1U
* ADD POLE TO NEUTRALIZE GBWP ZERO
R120 120 0 10T
GR120 120 0 120 0 1M
C120 120 0 300U
*
*
* PSRR Minus Pole
*
G121 0 121 120 0 1
L121 121 122 3.53M
R122 122 0 10T
GR122 122 0 122 0 1
*
* PSRR Minus Zero
*
G124 0 124 121 0 1
R124 124 0 10T
C124 124 0 244N
GR124 124 0 124 0 1
*
* PSRR Minus 2nd Pole
*
G125 0 125 124 0 1
L125 125 126 79.6N
R126 126 0 1G
GR126 126 0 126 0 1
*
* PSRR Minus 2nd Zero
*
G1217 0 127 125 0 1
R127 127 0 1G
C127 127 0 15.9P
GR127 127 0 127 0 1
*
* CMRR Gain and GBWP Pole Neutralization and Wave Shaping
*
* G50 THE DC GAIN FOR CMRR
G130 0 130 VALUE { ( V(15) ) * 4.99U}
* Add Zero To Neutralize GBWP Pole
R130 130 0 1G
GR130 130 0 130 0 1m
C130 130 0 300U
*
*
* CMRR Pole
*
G131 0 131 130 0 1
L131 131 132 1.59M
R132 132 0 1G
GR132 132 0 132 0 1
*
* CMRR Zero
*
G133 0 133 131 0 1
R133 133 0 1G
C133 133 0 1.76U
GR133 133 0 133 0 1
*
* CMRR 2nd Pole
*
G134 0 134 133 0 1
L134 134 135 159P
R135 135 0 1G
GR135 135 0 135 0 1
*
* CMRR 2nd Zero
*
G137 0 137 134 0 1
R137 137 0 1G
C137 137 0 159P
GR137 137 0 137 0 1
*
GD55 55 57 TABLE { V(55,57) } ((-0.2m,-400)(-0.1m,-1m)(0,0)(10,1n))
GD56 57 56 TABLE { V(57,56) } ((-0.2m,-400)(-0.1m,-1m)(0,0)(10,1n))
E55 55 0 VALUE { 0.00 + V(3) * 1 + V(51) * -23.7M }
E56 56 0 VALUE { 0.00 + V(4) * 1 + V(52) * -21.2M }
R51 51 0 1k
R52 52 0 1k
GD51 50 51 TABLE { V(50,51) } ((-10,-1n)(0,0)(1m,1m)(2m,1))
GD52 50 52 TABLE { V(50,52) } ((-2m,-1)(-1m,-1m)(0,0)(10,1n))
G53 3 0 VALUE { -500U + V(51) * 1M }
G54 0 4 VALUE { -500U + V(52) * -1M }
*
* Current Limit
*
GD98A 98 98A TABLE { V(98,98A) } ((-3m,-1000)(-2m,-10)(-1m,-1)(0,0)(1,1n))
GD98B 98 98B TABLE { V(98,98B) } ((-1,-1n)(0,0)(1m,1)(2m,10)(3m,1000))
R98A 0 98A 1 TC=-857U,-1.66U
R98B 0 98B 1 TC=-3.01M,-461N
G99 96 5 99 0 1
G97 0 98 TABLE { V(96,5) } ((-11.0,-1.00M)(-1.00M,-990U)(0,0)(1.00M,990U)(11.0,1.00M))
E97 99 0 VALUE { V(98) * LIMIT((( V(3) - V(4) ) * 6.19 + -4.57), 0.00, 1E6 ) * LIMIT((( V(3) - V(4) ) * 5.00 + -3.5), 0, 1) }
D98 4 5 DESD
D99 5 3 DESD
*
* Temperature / Voltage Sensitive IQuiscent
*
R61 0 61 1 TC=437U,-2.12U
G61 3 4 61 0 1
G60 0 61 TABLE { V(3, 4) } ((0, 0)(600M,489N)(1.00,28.0U)(1.15,35.0U)(1.25,40.0U)(1.45,48.0U)(2.00,48.2U)
+ (3.5,48.7U)(4.00,48.9U)(6.00,49.0U))
*
* Temperature Sensitive offset voltage
*
I73 0 70 DC 1
R74 0 70 1 TC=600N
E75 1B 71 VALUE {V(70)-1}
*
* Temp Sensistive IBias
*
I62 0 62 DC 1uA
R62 622 62 REXP 4.66458
R622 0 622 REXP_2 6.08958M
*
* Temp Sensistive Offset IBias
*
I63 0 63 DC 1uA
R63 0 63 5.5 TC=-3.81M,-36.7U
*
*
G57X 0 57X VALUE { V(35) * 666U + V(118) + V(127) + V(137) }
R57X 57X 0 1.5K
G35X 33 0 TABLE { V(57X,3) } ((-1,-1p)(0,0)(50M,1n)(375.0,1))
G36X 33 0 TABLE { V(57X,4) } ((-375.0,-1)(-50M,-1n)(0,0)(1,1p))
*
* Models
.MODEL NMI NMOS(L=2.00U W=42.0U KP=200U LEVEL=1 )
.MODEL DESD D N=1 IS=1.00E-15
.MODEL DN1 D IS=1P KF=5.00P AF=1
.MODEL REXP RES TCE=-497.70342M
.MODEL REXP_2 RES TCE= 11.00975
.ENDS MCP6006

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* TLC555
*****************************************************************************
* (C) Copyright 2011 Texas Instruments Incorporated. All rights reserved.
*****************************************************************************
** This model is designed as an aid for customers of Texas Instruments.
** TI and its licensors and suppliers make no warranties, either expressed
** or implied, with respect to this model, including the warranties of
** merchantability or fitness for a particular purpose. The model is
** provided solely on an "as is" basis. The entire risk as to its quality
** and performance is with the customer.
*****************************************************************************
*
* This model is subject to change without notice. Texas Instruments
* Incorporated is not responsible for updating this model.
*
*****************************************************************************
*
** Released by: Analog eLab Design Center, Texas Instruments Inc.
* Part: TLC555
* Date: 13JUN2011
* Model Type: ALL IN ONE
* Simulator: TINA
* Simulator Version: 9.1.30.94 SF-TI
* EVM Order Number: N/A
* EVM Users Guide: N/A
* Datasheet: SLFS043F - SEPTEMBER 1983 - REVISED FEBRUARY 2005
*
* Model Version: 1.0
*
*****************************************************************************
*
* Updates:
*
* Version 1.0 :
* Release to Web
*
*****************************************************************************
*
* THIS MODEL IS APPLICABLE FOR TLC555 & TLC556
*
*****************************************************************************
.SUBCKT TLC555 THRES CONT TRIG RESET OUT DISC VCC GND
XD8 GND RESI D_Z18V
XD7 GND RESET D_Z18V
XR2 RESET RESI TLC55X_RWELL
+ PARAMS: W=50u L=20u
XD2 GND TRGI D_Z18V
XD1 GND TRIG D_Z18V
XR3 TRIG TRGI TLC55X_RWELL
+ PARAMS: W=50u L=20u
XD4 GND THRI D_Z18V
XD3 GND THRES D_Z18V
XR2_2 THRES THRI TLC55X_RWELL
+ PARAMS: W=50u L=20u
XD6 GND CONTI D_Z18V
XD5 GND CONT D_Z18V
XR2_3 CONT CONTI TLC55X_RWELL
+ PARAMS: W=50u L=20u
XMN15 GOUT GND QFF GND MDSWN
+ PARAMS: W=100U L=10U M=7
XMP15 GOUT VCC QFF GND MDSWP
+ PARAMS: W=195U L=10U M=9
XMN3 GND TRGO 23 IIMIRRN
+ PARAMS: W1=170U L1=18U M1=1 W2=170U L2=18U M2=1 IDIN=1U
XMN5 GND THRS 25 IIMIRRN
+ PARAMS: W1=13U L1=26U M1=1 W2=52U L2=13U M2=2 IDIN=50N
XMp9 VCC RESO 15 GND IMIRRP
+ PARAMS: W=112U L=15U M=2 IO=2U
XMp6 VCC 25 15 GND IMIRRP
+ PARAMS: W=18U L=26U M=1 IO=100n
XMp5 VCC TRGS 15 GND IMIRRP
+ PARAMS: W=112U L=15U M=2 IO=2U
XMp1 VCC THRO 29 IIMIRRP
+ PARAMS: W1=172U L1=15U M1=1 W2=172U L2=15U M2=1 IDIN=1U
XIB VCC GND 15 IBIAS
XRSFF TRGO THRO RESO QFF 30 VCC GND RR1SFF
+ PARAMS: VOUTH=1 VOUTL=0 RIN=1E12 DELAY=30N ROUT=10
XMN9 TRGO RESO GND MSWN
+ PARAMS: W=100U L=10U M=1
XMN17 DISC GOUT GND GND TLC55X_NMOS_HV
+ PARAMS: W=350U L=10U M=20
XMN16 OUT GOUT GND GND TLC55X_NMOS_HV
+ PARAMS: W=175U L=10U M=20
XMP16 OUT GOUT VCC VCC TLC55X_PMOS_HV
+ PARAMS: W=270u L=10u M=7
XMN10 RESO RESI GND GND TLC55X_NMOS_HV_L1
+ PARAMS: W=100u L=10u M=1
XMN2 THRO THRI THRS GND TLC55X_NMOS_MV
+ PARAMS: W=170u L=18u M=2
XMP4 TRGO TRGI TRGS VCC TLC55X_PMOS_MV
+ PARAMS: W=172u L=15u M=2
XMP3 23 TRGC TRGS VCC TLC55X_PMOS_MV
+ PARAMS: W=172u L=15u M=2
XMPR1F GND GND 32 TRGC TLC55X_PMOS_LV
+ PARAMS: W=20U L=15U M=1
XMPR1E 32 32 TRGC TRGC TLC55X_PMOS_LV
+ PARAMS: W=20U L=15U M=1
XMPR1D TRGC TRGC 33 CONTI TLC55X_PMOS_LV
+ PARAMS: W=20U L=15U M=1
XMPR1C 33 33 CONTI CONTI TLC55X_PMOS_LV
+ PARAMS: W=20U L=15U M=1
XMPR1B CONTI CONTI 34 VCC TLC55X_PMOS_LV
+ PARAMS: W=20u L=15u M=1
XMPR1A 34 34 VCC VCC TLC55X_PMOS_LV
+ PARAMS: W=20u L=15u M=1
XMN1 29 CONTI THRS GND TLC55X_NMOS_MV
+ PARAMS: W=170u L=18u M=2
.ENDS TLC555
.SUBCKT TLC55X_NMOS_HV D G S B PARAMS: W = 100U L = 10U M = 1
M1 D G S B TLC55X_NMOSD_HV W = {W} L = {L} M = {M} AD={W*LS} AS={W*LS} PD={W + 2*LS} PS={W + 2*LS}
+ NRD={LS/W} NRS={LS/W}
.ENDS
*$
.SUBCKT TLC55X_NMOS_HV_L1 D G S B PARAMS: W = 100U L = 10U M = 1
M1 D G S B TLC55X_NMOSD_HV_L1 W = {W} L = {L} M = {M} AD={W*LS} AS={W*LS} PD={W + 2*LS} PS={W + 2*LS}
+ NRD={LS/W} NRS={LS/W}
.ENDS
*$
.SUBCKT TLC55X_NMOS_MV D G S B PARAMS: W = 100U L = 10U M = 1
M1 D G S B TLC55X_NMOSD_MV W = {W} L = {L} M = {M} AD={W*LS} AS={W*LS} PD={W + 2*LS} PS={W + 2*LS}
+ NRD={LS/W} NRS={LS/W}
.ENDS
*$
.SUBCKT TLC55X_NMOS_LV D G S B PARAMS: W = 100U L = 10U M = 1
M1 D G S B TLC55X_NMOSD_LV W = {W} L = {L} M = {M} AD={W*LS} AS={W*LS} PD={W + 2*LS} PS={W + 2*LS}
+ NRD={LS/W} NRS={LS/W}
.ENDS
*$
.MODEL TLC55X_NMOSD_HV NMOS LEVEL=3 L=10U W=100U KP={KPN} VTO={VTOHN} LAMBDA=2E-3 THETA=1.8E-01
+ CJ={CJN} CJSW={CJSWN} CGSO={CGSON} CGDO={CGDON} RSH= 10 PB=0.65 LD= 70N TOX={TOX}
*$
.MODEL TLC55X_NMOSD_HV_L1 NMOS LEVEL=1 L=10U W=100U KP={KPN} VTO={VTOHN} LAMBDA=2E-3
+ CJ={CJN} CJSW={CJSWN} CGSO={CGSON} CGDO={CGDON} RSH= 10 PB=0.65 LD= 70N TOX={TOX}
*$
.MODEL TLC55X_NMOSD_MV NMOS LEVEL=1 L=10U W=100U KP={KPN} VTO={VTOMN} LAMBDA=2E-3
+ CJ={CJNCG} CJSW={CJSWNCG} CGSO={CGSONCG} CGDO={CGDONCG} PB=0.65 LD= 70N TOX={TOXCG}
*+ RSH= 10
*$
.MODEL TLC55X_NMOSD_LV NMOS LEVEL=1 L=10U W=100U KP={KPN} VTO={VTON} LAMBDA=2E-3
+ CJ={CJN} CJSW={CJSWN} CGSO={CGSON} CGDO={CGDON} PB=0.65 LD= 300N TOX={TOX}
*+ RSH= 10
*$
.SUBCKT TLC55X_PMOS_HV D G S B PARAMS: W = 100U L = 10U M = 1
M1 D G S B TLC55X_PMOSD_HV W = {W} L = {L} M = {M} AD={W*LS} AS={W*LS} PD={W + 2*LS} PS={W + 2*LS}
+ NRD={LS/W} NRS={LS/W}
.ENDS
*$
.SUBCKT TLC55X_PMOS_MV D G S B PARAMS: W = 100U L = 10U M = 1
M1 D G S B TLC55X_PMOSD_MV W = {W} L = {L} M = {M} AD={W*LS} AS={W*LS} PD={W + 2*LS} PS={W + 2*LS}
+ NRD={LS/W} NRS={LS/W}
.ENDS
*$
.SUBCKT TLC55X_PMOS_LV D G S B PARAMS: W = 100U L = 10U M = 1
M1 D G S B TLC55X_PMOSD_LV W = {W} L = {L} M = {M} AD={W*LS} AS={W*LS} PD={W + 2*LS} PS={W + 2*LS}
+ NRD={LS/W} NRS={LS/W}
.ENDS
*$
.MODEL TLC55X_PMOSD_HV PMOS LEVEL=3 L=10U W=100U KP={KPP} VTO={-VTOHP} LAMBDA=2E-3 THETA=2.2E-01
+ CJ={CJP} CJSW={CJSWP} CGSO={CGSOP} CGDO={CGDOP} RSH=10 PB=0.65 LD=70N TOX={TOX}
*$
.MODEL TLC55X_PMOSD_MV PMOS LEVEL=1 L=10U W=100U KP={KPP} VTO={-VTOMP} LAMBDA=2E-3
*+ CJ={CJP} CJSW={CJSWP} CGSO={CGSOP} CGDO={CGDOP} PB=0.65 LD=70N TOX={TOX}
+ CJ={CJNCG} CJSW={CJSWNCG} CGSO={CGSONCG} CGDO={CGDONCG} PB=0.65 LD= 70N TOX={TOXCG}
*+ RSH= 10
*$
.MODEL TLC55X_PMOSD_LV PMOS LEVEL=1 L=10U W=100U KP={KPP} VTO={-VTOP} LAMBDA=2E-3
+ CJ={CJP} CJSW={CJSWP} CGSO={CGSOP} CGDO={CGDOP} PB=0.65 LD=300N TOX={TOX}
*+ RSH= 10
*$
.SUBCKT TLC55X_RWELL 1 2 PARAMS: W = 10U L = 100U
XR1 1 2 TLC55X_RWELLD PARAMS: W = {W} L = {L}
.ENDS
*$
.SUBCKT TLC55X_RWELLD 1 2 PARAMS: W = 10U L = 100U
R1 1 2 {RSW*L/W}
.ENDS
*$
.SUBCKT TLC55X_RNSD 1 2 PARAMS: W = 10U L = 100U
XR1 1 2 TLC55X_RNSD_D PARAMS: W = {W} L = {L}
.ENDS
*$
.SUBCKT TLC55X_RNSD_D 1 2 PARAMS: W = 10U L = 100U
R1 1 2 {RSN*L/W}
.ENDS
*$
.SUBCKT TLC55X_RC 1 2 PARAMS: WW = 10U LW = 100U WNSD = 10U LNSD = 100U
XR1 1 2 TLC55X_RC_D PARAMS: WW = {WW} LW = {LW} WNSD = {WNSD} LNSD = {LNSD}
.ENDS
*$
.SUBCKT TLC55X_RC_D 1 2 PARAMS: WW = 10U LW = 100U WNSD = 10U LNSD = 100U
R1 1 2 {RSW*LW/WW + RSN*LNSD/WNSD}
.ENDS
*
.SUBCKT IBIAS VCC GND VIB
*
.PARAM M1 = 8
.PARAM M2 = 5
.PARAM MP = 1
.PARAM WP = 13U
.PARAM WN = 130U
.PARAM LPE = {36U - LDP}
.PARAM LNE = {13U - LDN}
.PARAM BP = {MP*(WP/LPE)*(KPP/2)}
.PARAM WW = 13U
.PARAM LW = 213U
.PARAM WNN = 25U
.PARAM LNN = 87U
.PARAM R1 = {(RSW*LW/WW + RSN*LNN/WNN)}
.PARAM K2 = {M2*(WN/LNE)*(KPN/2)}
.PARAM MR = {M2/M1}
*
R1 VIB GND {VBMUL}
GB VCC VIB VALUE = {LIMIT( IF ( V(VCC,GND) > VTOHP, BP*PWR(V(VCC,GND)-VTOHP, 2), 0),
+ (1 + 1*LAMBDA*(V(VCC,GND) - VTOHN))*PWR(( 1 - SQRT(MR/(1+2*LAMBDA*(V(VCC,GND) - VTOHP))) )/R1, 2)/K2, 0)}
R2 VIB VCC {RPAR}
.ENDS
.SUBCKT IMIRRP VCC IO VIB GND PARAMS: W = 100U L = 10U M = 1 IO = 1U
*
.PARAM MP = 1
.PARAM WP = 13U
.PARAM LPE = {36U - LDP}
.PARAM LE = {L - LDP}
.PARAM MR = { M*W/LE/(MP*WP/LPE)/VBMUL }
.PARAM B1 = { (KPP/2*MP*WP/LPE)*VBMUL }
.PARAM IS = 1E-12
.PARAM N = {VTOHP/(VT*Log(1 + IO/IS))}
*
GB VCC IO VIB GND {MR}
R1 VCC IO {RPAR}
C1 VCC IO {M*(CBDJ*CJP*LS*W + CBDS*CJSWP*(2*LS + W))}
V1 VCC 10 {VTOHP}
D1 IO 10 DMOD1
.MODEL DMOD1 D (IS={IS} N={N} )
.ENDS
.SUBCKT IIMIRRP VCC IO II PARAMS: W1 = 100U L1 = 10U M1 = 1 W2 = 100U L2= 10U M2 = 2 IDIN = 1U
*
.PARAM L1E = {L1 - LDP}
.PARAM L2E = {L2 - LDP}
.PARAM B1 = {M1*(W1/L1)*(KPP/2)}
.PARAM MR = {M2*W2/L2E/(M1*W1/L1E)}
.PARAM RDS = {1/(2*SQRT(M2*(W2/L2E)*(KPP/2)*IDIN))}
.PARAM IS = 1E-12
.PARAM NP = {VTOP/(VT*Log(1 + IDIN/IS))}
*
FB VCC IO V1 {MR}
R1 VCC IO {RPAR}
C1 VCC IO {M2*(CBDJ*CJP*LS*W2 + CBDS*CJSWP*(2*LS + W2))}
D1 IO 10 DMODP
V1 VCC 10 {VTOP}
R2 II 10 {RDS}
C2 VCC II {M1*(CBDJ*CJP*LS*W1 + CBDS*CJSWP*(2*LS + W1)) + 2/3*COX*(M1*W1*L1E + M2*W2*L2E) + M1*CGSOP*W1}
C3 II IO {CGDOP*W2}
.MODEL DMODP D (IS={IS} N={NP} )
.ENDS
.SUBCKT IIMIRRN GND IO II PARAMS: W1 = 100U L1 = 10U M1 = 1 W2 = 100U L2= 10U M2 = 2 IDIN = 1U
*
.PARAM L1E = {L1 - LDN}
.PARAM L2E = {L2 - LDN}
.PARAM B1 = {M1*(W1/L1)*(KPN/2)}
.PARAM MR = { M2*W2/L2E/(M1*W1/L1E) }
.PARAM RDS = {1/(2*SQRT(M2*(W2/L2E)*(KPN/2)*IDIN))}
.PARAM IS = 1E-12
.PARAM NN = {VTON/(VT*Log(1 + IDIN/IS))}
*
FB IO GND V1 {MR}
R1 IO GND {RPAR}
C1 IO GND {M2*(CBDJ*CJN*LS*W2 + CBDS*CJSWN*(2*LS + W2))}
D1 10 IO DMODN
V1 10 GND {VTON}
R2 II 10 {RDS}
C2 II GND {M1*(CBDJ*CJN*LS*W1 + CBDS*CJSWN*(2*LS + W1)) + 2/3*COX*(M1*W1*L1E + M2*W2*L2E) + M1*CGSON*W1}
C3 II IO {M2*CGDON*W2}
.MODEL DMODN D (IS={IS} N={NN} )
.ENDS
.SUBCKT MDSWP D S DG GND PARAMS: W = 100U L = 10U M = 1
*
.PARAM LE = {L - LDP}
*
S1 D S DG GND SWN
C1 D S {M*(CBDJ*CJP*LS*W + CBDS*CJSWP*(2*LS + W))}
*D B
.MODEL SWN VSWITCH ( VON = {0.49} VOFF = {0.55} RON={1/(2*M*(W/LE)*(KPP/2)*10)} ROFF={1G} )
.ENDS
.SUBCKT MDSWN D S DG GND PARAMS: W = 100U L = 10U M = 1
*
.PARAM LE = {L - LDN}
*
S1 D S DG GND SWN
C1 D S {M*(CBDJ*CJN*LS*W + CBDS*CJSWN*(2*LS + W))}
*D B
.MODEL SWN VSWITCH ( VON = {0.55} VOFF = {0.49} RON={1/(2*M*(W/LE)*(KPN/2)*10)} ROFF={1G} )
.ENDS
.SUBCKT MSWN D G S PARAMS: W = 100U L = 10U M = 1
*
.PARAM LE = {L - LDN}
*
*C1 D S {M*(CBDJ*CJN*LS*W + CBDS*CJSWN*(2*LS + W))}
*D B
*C2 G S {M*2/3*COX*(W*LE) + CGSON*W}
*C3 G D {CGDON*W}
S1 D S G S SWN
.MODEL SWN VSWITCH ( VON = {VTON+1} VOFF = {VTON} RON={1/(2*M*(W/L)*(KPN/2)*10)} ROFF={1G} )
.ENDS
*
* CONNECTIONS: A
* | C
* | |
.SUBCKT D_Z18V 1 2
D1 1 2 DZ_18V
.ENDS
.PARAM ISZ = 5P
.PARAM NZ = {0.3/(VT*Log(1 + 5.0M/ISZ))}
.MODEL DZ_18V D( IS={ISz} N={Nz} BV=18.0 IBV=5.0M EG={8*Nz*VT})
.SUBCKT RR1SFF S R R1 Q Q_ VCC GND
+ PARAMS: VOUTH=5.0 VOUTL=0 RIN=1E12 DELAY=10N ROUT=10
.PARAM W1 = 100U
.PARAM L1 = 10U
.PARAM W2 = 100U
.PARAM L2= 10U
.PARAM W3 = 10U
.PARAM L3 = 25U
.PARAM W4 = 10U
.PARAM L4= 100U
*
XU1 Q GND S GND Q_ GND COMP2INPNORSD
+ PARAMS: ROUT={ROUT} DELAYLH={1N} DELAYHL={1N} VOUTH={VOUTH} VOUTL={VOUTL}
+ VTHRES1={0.5*(VOUTH-VOUTL)} VTHRES2={VTOCN}
XU2 VCC R R1 GND Q_ GND Q VCC GND COMP3INPNORSD
+ PARAMS: ROUT={ROUT} DELAYLH={15N} DELAYHL={1N} VOUTH={VOUTH} VOUTL={VOUTL}
+ VTHRES1={VTOCP} VTHRES2={VTOCN} VTHRES3={0.49*(VOUTH-VOUTL)}
*C1 S GND {0.5*COX*(W1*L1) + CGSON*W1}
*C2 R VCC {0.5*COX*(W2*L2) + CGSOP*W2}
*C3 R1 GND {0.5*COX*(W3*L3) + CGSON*W3}
*C4 R1 VCC {0.5*COX*(W4*L4) + CGSOP*W4}
.ENDS
.SUBCKT COMP2INPNORSD IN1+ IN1- IN2+ IN2- OUT GND
+ PARAMS: ROUT=0 DELAYLH=0 DELAYHL=0 VOUTH=0 VOUTL=0 VTHRES1=0 VTHRES2=0
*
.PARAM TDELLH = {IF ( (DELAYLH < 1E-9) , 1E-9, DELAYLH ) }
.PARAM TDELHL = {IF ( (DELAYHL < 1E-9) , 1E-9, DELAYHL ) }
.PARAM RO = {IF ( (TDEL > 1E-15) & (ROUT < 1), 1, ROUT ) }
.PARAM TDEL = {(TDELLH+TDELHL)/2}
.PARAM COUT={TDEL/(0.693*(RO+1U))}
.PARAM RDELLH = {TDELLH/(0.693*(COUT+1F))}
.PARAM RDELHL = {TDELHL/(0.693*(COUT+1F))}
EOUT OUT GND VALUE= { IF ( (V(IN1+,IN1-) > {VTHRES1}) | (V(IN2+,IN2-) > {VTHRES2}),
+ VOUTL + RDELLH*I(EOUT), VOUTH + RDELHL*I(EOUT) ) }
COUT OUT GND {COUT}
.ENDS COMP2INPNORSD
.SUBCKT COMP3INPNORSD IN1+ IN1- IN2+ IN2- IN3+ IN3- OUT VCC GND
+ PARAMS: ROUT=0 DELAYLH=0 DELAYHL=0 VOUTH=0 VOUTL=0 VTHRES1=0 VHYST1=0 VTHRES2=0 VHYST2=0 VTHRES3=0 VHYST3=0
*
.PARAM TDELLH = {IF ( (DELAYLH < 1E-9) , 1E-9, DELAYLH ) }
.PARAM TDELHL = {IF ( (DELAYHL < 1E-9) , 1E-9, DELAYHL ) }
.PARAM RO = {IF ( (TDEL > 1E-15) & (ROUT < 1), 1, ROUT ) }
.PARAM TDEL = {(TDELLH+TDELHL)/2}
.PARAM COUT={TDEL/(0.693*(RO+1U))}
.PARAM VREFN = {(15-VTOHN)}
.PARAM VREFP = {(15-VTOHP)}
.PARAM RDELLH = {TDELLH/(0.693*(COUT+1F))*VREFP}
.PARAM RDELHL = {TDELHL/(0.693*(COUT+1F))*VREFN}
*
EOUT OUT GND VALUE= { IF ( (V(IN1+,IN1-) > {VTHRES1}) | (V(IN2+,IN2-) > {VTHRES2}) | (V(IN3+,IN3-) > {VTHRES3}),
+ VOUTL + RDELLH*I(EOUT)*V(1,GND), VOUTH + RDELHL*I(EOUT)*V(1,GND) ) }
E1 1 GND VALUE= { IF ( (V(VCC,GND) > {VTOHP+0.01}), 1/(V(VCC,GND)-VTOHP), 100 ) }
COUT OUT GND {COUT}
.ENDS COMP3INPNORSD
.PARAM LS = 1.0U
.PARAM VTOP_ = 0.31
.PARAM VTOP = 0.14
.PARAM VTON = 0.14
.PARAM VTOMP = 0.6
.PARAM VTOMN = 0.55
.PARAM VTOHP = 0.85
.PARAM VTOHN = 0.80
.PARAM LAMBDA = 2M
.PARAM KPN = 6.0E-05
.PARAM KPP = 3.0E-05
.PARAM LDN = 0.07U
.PARAM LDP = 0.07U
.PARAM RSW = 1810
.PARAM RSN = 1.41
.PARAM VBMUL = 1E6
.PARAM RPAR = 1T
.PARAM CBDJ = 1
.PARAM CBDS = 1
.PARAM CN = 0.8
*0.8U
.PARAM CJN = {CN*180U}
.PARAM CJP = {CN*300U}
.PARAM CJSWN = {CN*1N}
.PARAM CJSWP = {CN*2.2N}
.PARAM XJN = 0.2U
.PARAM CGSON = {CN*0.6 * XJN * COX}
.PARAM CGDON = {CGSON}
.PARAM XJP = 0.3U
.PARAM CGSOP = {CN*0.6 * XJN * COX}
.PARAM CGDOP = {CGSOP}
.PARAM EPSSIO2 = {3.9*8.854214871E-12}
.PARAM TOX = 1000E-10
.PARAM COX = {EPSSIO2/TOX}
.PARAM EC = 1.5E6
.PARAM VTOCP = {VTOHP+0.05}
.PARAM VTOCN = {VTOHN+0.05}
*CG
.PARAM CCG = 0.2
.PARAM CJNCG = {CCG*180U}
.PARAM CJPCG = {CCG*300U}
.PARAM CJSWNCG = {CCG*1N}
.PARAM CJSWPCG = {CCG*2.2N}
.PARAM XJNCG = 0.2U
.PARAM CGSONCG = {CCG*0.6 * XJNCG * COXCG}
.PARAM CGDONCG = {CGSONCG}
.PARAM XJPCG = 0.3U
.PARAM CGSOPCG = {CCG*0.6 * XJNCG * COXCG}
.PARAM CGDOPCG = {CGSOPCG}
.PARAM TOXCG = 1000E-10
.PARAM COXCG = {EPSSIO2/TOXCG}

6054
badge-lugman.kicad_pcb Normal file

File diff suppressed because it is too large Load Diff

131
badge-lugman.kicad_prl Normal file
View File

@@ -0,0 +1,131 @@
{
"board": {
"active_layer": 13,
"active_layer_preset": "",
"auto_track_width": true,
"hidden_netclasses": [],
"hidden_nets": [],
"high_contrast_mode": 0,
"net_color_mode": 1,
"opacity": {
"images": 0.6,
"pads": 1.0,
"shapes": 1.0,
"tracks": 1.0,
"vias": 1.0,
"zones": 0.6
},
"selection_filter": {
"dimensions": true,
"footprints": true,
"graphics": true,
"keepouts": true,
"lockedItems": false,
"otherItems": true,
"pads": true,
"text": true,
"tracks": true,
"vias": true,
"zones": true
},
"visible_items": [
"vias",
"footprint_text",
"footprint_anchors",
"ratsnest",
"grid",
"footprints_front",
"footprints_back",
"footprint_values",
"footprint_references",
"tracks",
"drc_errors",
"drawing_sheet",
"bitmaps",
"pads",
"zones",
"drc_warnings",
"drc_exclusions",
"locked_item_shadows",
"conflict_shadows",
"shapes"
],
"visible_layers": "ffffffff_ffffffff_ffffd575_7f57ffff",
"zone_display_mode": 0
},
"git": {
"repo_type": "",
"repo_username": "",
"ssh_key": ""
},
"meta": {
"filename": "badge-lugman.kicad_prl",
"version": 5
},
"net_inspector_panel": {
"col_hidden": [
false,
false,
false,
false,
false,
false,
false,
false,
false,
false
],
"col_order": [
0,
1,
2,
3,
4,
5,
6,
7,
8,
9
],
"col_widths": [
0,
0,
0,
0,
0,
0,
0,
0,
0,
0
],
"custom_group_rules": [],
"expanded_rows": [],
"filter_by_net_name": true,
"filter_by_netclass": true,
"filter_text": "",
"group_by_constraint": false,
"group_by_netclass": false,
"show_unconnected_nets": false,
"show_zero_pad_nets": false,
"sort_ascending": true,
"sorting_column": 0
},
"open_jobsets": [],
"project": {
"files": []
},
"schematic": {
"selection_filter": {
"graphics": true,
"images": true,
"labels": true,
"lockedItems": false,
"otherItems": true,
"pins": true,
"symbols": true,
"text": true,
"wires": true
}
}
}

675
badge-lugman.kicad_pro Normal file
View File

@@ -0,0 +1,675 @@
{
"board": {
"3dviewports": [],
"design_settings": {
"defaults": {
"apply_defaults_to_fp_fields": false,
"apply_defaults_to_fp_shapes": false,
"apply_defaults_to_fp_text": false,
"board_outline_line_width": 0.05,
"copper_line_width": 0.2,
"copper_text_italic": false,
"copper_text_size_h": 1.5,
"copper_text_size_v": 1.5,
"copper_text_thickness": 0.3,
"copper_text_upright": false,
"courtyard_line_width": 0.05,
"dimension_precision": 4,
"dimension_units": 3,
"dimensions": {
"arrow_length": 1270000,
"extension_offset": 500000,
"keep_text_aligned": true,
"suppress_zeroes": true,
"text_position": 0,
"units_format": 0
},
"fab_line_width": 0.1,
"fab_text_italic": false,
"fab_text_size_h": 1.0,
"fab_text_size_v": 1.0,
"fab_text_thickness": 0.15,
"fab_text_upright": false,
"other_line_width": 0.1,
"other_text_italic": false,
"other_text_size_h": 1.0,
"other_text_size_v": 1.0,
"other_text_thickness": 0.15,
"other_text_upright": false,
"pads": {
"drill": 0.8,
"height": 1.27,
"width": 2.54
},
"silk_line_width": 0.1,
"silk_text_italic": false,
"silk_text_size_h": 1.0,
"silk_text_size_v": 1.0,
"silk_text_thickness": 0.1,
"silk_text_upright": false,
"zones": {
"min_clearance": 0.5
}
},
"diff_pair_dimensions": [],
"drc_exclusions": [],
"meta": {
"version": 2
},
"rule_severities": {
"annular_width": "error",
"clearance": "error",
"connection_width": "warning",
"copper_edge_clearance": "error",
"copper_sliver": "warning",
"courtyards_overlap": "error",
"creepage": "error",
"diff_pair_gap_out_of_range": "error",
"diff_pair_uncoupled_length_too_long": "error",
"drill_out_of_range": "error",
"duplicate_footprints": "warning",
"extra_footprint": "warning",
"footprint": "error",
"footprint_filters_mismatch": "ignore",
"footprint_symbol_mismatch": "warning",
"footprint_type_mismatch": "ignore",
"hole_clearance": "error",
"hole_to_hole": "warning",
"holes_co_located": "warning",
"invalid_outline": "error",
"isolated_copper": "warning",
"item_on_disabled_layer": "error",
"items_not_allowed": "error",
"length_out_of_range": "error",
"lib_footprint_issues": "warning",
"lib_footprint_mismatch": "warning",
"malformed_courtyard": "error",
"microvia_drill_out_of_range": "error",
"mirrored_text_on_front_layer": "warning",
"missing_courtyard": "ignore",
"missing_footprint": "warning",
"net_conflict": "warning",
"nonmirrored_text_on_back_layer": "warning",
"npth_inside_courtyard": "ignore",
"padstack": "warning",
"pth_inside_courtyard": "ignore",
"shorting_items": "error",
"silk_edge_clearance": "warning",
"silk_over_copper": "warning",
"silk_overlap": "warning",
"skew_out_of_range": "error",
"solder_mask_bridge": "error",
"starved_thermal": "error",
"text_height": "warning",
"text_on_edge_cuts": "error",
"text_thickness": "warning",
"through_hole_pad_without_hole": "error",
"too_many_vias": "error",
"track_angle": "error",
"track_dangling": "warning",
"track_segment_length": "error",
"track_width": "error",
"tracks_crossing": "error",
"unconnected_items": "error",
"unresolved_variable": "error",
"via_dangling": "warning",
"zones_intersect": "error"
},
"rules": {
"max_error": 0.005,
"min_clearance": 0.0,
"min_connection": 0.0,
"min_copper_edge_clearance": 0.5,
"min_groove_width": 0.0,
"min_hole_clearance": 0.25,
"min_hole_to_hole": 0.25,
"min_microvia_diameter": 0.2,
"min_microvia_drill": 0.1,
"min_resolved_spokes": 2,
"min_silk_clearance": 0.0,
"min_text_height": 0.8,
"min_text_thickness": 0.08,
"min_through_hole_diameter": 0.3,
"min_track_width": 0.0,
"min_via_annular_width": 0.1,
"min_via_diameter": 0.5,
"solder_mask_to_copper_clearance": 0.0,
"use_height_for_length_calcs": true
},
"teardrop_options": [
{
"td_onpthpad": true,
"td_onroundshapesonly": false,
"td_onsmdpad": true,
"td_ontrackend": false,
"td_onvia": true
}
],
"teardrop_parameters": [
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_round_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_rect_shape",
"td_width_to_size_filter_ratio": 0.9
},
{
"td_allow_use_two_tracks": true,
"td_curve_segcount": 0,
"td_height_ratio": 1.0,
"td_length_ratio": 0.5,
"td_maxheight": 2.0,
"td_maxlen": 1.0,
"td_on_pad_in_zone": false,
"td_target_name": "td_track_end",
"td_width_to_size_filter_ratio": 0.9
}
],
"track_widths": [],
"tuning_pattern_settings": {
"diff_pair_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 1.0
},
"diff_pair_skew_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
},
"single_track_defaults": {
"corner_radius_percentage": 80,
"corner_style": 1,
"max_amplitude": 1.0,
"min_amplitude": 0.2,
"single_sided": false,
"spacing": 0.6
}
},
"via_dimensions": [],
"zones_allow_external_fillets": false
},
"ipc2581": {
"dist": "",
"distpn": "",
"internal_id": "",
"mfg": "",
"mpn": ""
},
"layer_pairs": [],
"layer_presets": [],
"viewports": []
},
"boards": [],
"cvpcb": {
"equivalence_files": []
},
"erc": {
"erc_exclusions": [],
"meta": {
"version": 0
},
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4255
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